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(-)apr/include/arch/unix/apr_arch_atomic.h (+2 lines)
Lines 30-35 Link Here
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#   define USE_ATOMICS_GENERIC
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#   define USE_ATOMICS_GENERIC
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#elif HAVE_ATOMIC_BUILTINS
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#elif HAVE_ATOMIC_BUILTINS
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#   define USE_ATOMICS_BUILTINS
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#   define USE_ATOMICS_BUILTINS
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#elif defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
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#   define USE_ATOMICS_IA32
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#else
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#else
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#   define USE_ATOMICS_GENERIC
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#   define USE_ATOMICS_GENERIC
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#endif
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#endif
(-)apr/atomic/unix/ia32.c (+111 lines)
Line 0 Link Here
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/* Licensed to the Apache Software Foundation (ASF) under one or more
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 * contributor license agreements.  See the NOTICE file distributed with
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 * this work for additional information regarding copyright ownership.
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 * The ASF licenses this file to You under the Apache License, Version 2.0
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 * (the "License"); you may not use this file except in compliance with
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 * the License.  You may obtain a copy of the License at
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 *
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 *     http://www.apache.org/licenses/LICENSE-2.0
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 *
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 * Unless required by applicable law or agreed to in writing, software
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 * distributed under the License is distributed on an "AS IS" BASIS,
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 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 * See the License for the specific language governing permissions and
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 * limitations under the License.
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 */
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#include "apr_arch_atomic.h"
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#ifdef USE_ATOMICS_IA32
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APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p)
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{
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    return APR_SUCCESS;
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem)
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{
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    return *mem;
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}
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APR_DECLARE(void) apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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    *mem = val;
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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    asm volatile ("lock; xaddl %0,%1"
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                  : "=r" (val), "=m" (*mem)
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                  : "0" (val), "m" (*mem)
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                  : "memory", "cc");
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    return val;
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}
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APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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    asm volatile ("lock; subl %1, %0"
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                  : /* no output */
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                  : "m" (*(mem)), "r" (val)
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                  : "memory", "cc");
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
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{
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    return apr_atomic_add32(mem, 1);
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}
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APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
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{
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    unsigned char prev;
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    asm volatile ("lock; decl %0; setnz %1"
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                  : "=m" (*mem), "=qm" (prev)
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                  : "m" (*mem)
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                  : "memory");
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    return prev;
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,
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                                           apr_uint32_t cmp)
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{
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    apr_uint32_t prev;
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    asm volatile ("lock; cmpxchgl %1, %2"
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                  : "=a" (prev)
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                  : "r" (with), "m" (*(mem)), "0"(cmp)
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                  : "memory", "cc");
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    return prev;
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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    apr_uint32_t prev = val;
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    asm volatile ("lock; xchgl %0, %1"
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                  : "=r" (prev)
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                  : "m" (*(mem)), "0"(prev)
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                  : "memory");
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    return prev;
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}
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APR_DECLARE(void*) apr_atomic_casptr(volatile void **mem, void *with, const void *cmp)
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{
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    void *prev;
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#if APR_SIZEOF_VOIDP == 4
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    asm volatile ("lock; cmpxchgl %2, %1"
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                  : "=a" (prev), "=m" (*mem)
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                  : "r" (with), "m" (*mem), "0" (cmp));
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#elif APR_SIZEOF_VOIDP == 8
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    asm volatile ("lock; cmpxchgq %q2, %1"
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                  : "=a" (prev), "=m" (*mem)
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                  : "r" ((unsigned long)with), "m" (*mem),
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                    "0" ((unsigned long)cmp));
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#else
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#error APR_SIZEOF_VOIDP value not supported
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#endif
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    return prev;
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}
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#endif /* USE_ATOMICS_IA32 */

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