Attachment #20468 for bug #42806

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Lines 75-78 APR_DECLARE(void*) apr_atomic_casptr(voi Link Here

(-)apr/atomic/unix/builtins.c (+7 lines)
75	return (void*) __sync_val_compare_and_swap(mem, cmp, with);	75	return (void*) __sync_val_compare_and_swap(mem, cmp, with);
76	}	76	}
77		77
		78	APR_DECLARE(void) apr_atomic_xchgptr(void mem, void with)
		79	{
		80	__sync_synchronize();
		81
		82	return __sync_lock_test_and_set(mem, with);
		83	}
		84
78	#endif /* USE_ATOMICS_BUILTINS */	85	#endif /* USE_ATOMICS_BUILTINS */

Lines 75-78 APR_DECLARE(void*) apr_atomic_casptr(voi Link Here

(-)apr/atomic/unix/solaris.c (+5 lines)
75	return atomic_cas_ptr(mem, cmp, with);	75	return atomic_cas_ptr(mem, cmp, with);
76	}	76	}
77		77
		78	APR_DECLARE(void) apr_atomic_xchgptr(void mem, void with)
		79	{
		80	return atomic_swap_ptr(mem, with);
		81	}
		82
78	#endif /* USE_ATOMICS_SOLARIS */	83	#endif /* USE_ATOMICS_SOLARIS */

Lines 122-127 APR_DECLARE(apr_uint32_t) apr_atomic_xch Link Here

(-)apr/include/apr_atomic.h (+8 lines)
122	*/	122	*/
123	APR_DECLARE(void) apr_atomic_casptr(void mem, void with, void *cmp);	123	APR_DECLARE(void) apr_atomic_casptr(void mem, void with, void *cmp);
124		124
		125	/**
		126	* exchange a pair of pointer values
		127	* @param mem pointer to the pointer
		128	* @param with what to swap it with
		129	* @return the old value of the pointer
		130	*/
		131	APR_DECLARE(void) apr_atomic_xchgptr(void mem, void with);
		132
125	/** @} */	133	/** @} */
126		134
127	#ifdef __cplusplus	135	#ifdef __cplusplus




    return prev;
}

APR_DECLARE(void*) apr_atomic_xchgptr(void **mem, void *with)
{
    void *prev;
#if APR_SIZEOF_VOIDP == 4
    asm volatile ("lock; xchgl %2, %1"
                  : "=a" (prev), "=m" (*mem)
                  : "r" (with), "m" (*mem)
                  : "memory");
#elif APR_SIZEOF_VOIDP == 8
    asm volatile ("lock; xchgq %q2, %1"
                  : "=a" (prev), "=m" (*mem)
                  : "r" ((unsigned long)with), "m" (*mem)
                  : "memory");
#else
#error APR_SIZEOF_VOIDP value not supported
#endif
    return prev;
}

#endif /* USE_ATOMICS_IA32 */




    return prev;
}

APR_DECLARE(void*) apr_atomic_xchgptr(void **mem, void *with)
{
    void *prev;
    DECLARE_MUTEX_LOCKED(mutex, mem);

    prev = *mem;
    *mem = with;

    MUTEX_UNLOCK(mutex);

    return prev;
}

#endif /* USE_ATOMICS_GENERIC */

Lines 68-70 APR_DECLARE(void *) apr_atomic_casptr(vo Link Here

(-)apr/atomic/netware/apr_atomic.c (+5 lines)
68	{	68	{
69	return (void)atomic_cmpxchg((unsigned long )mem,(unsigned long)cmp,(unsigned long)with);	69	return (void)atomic_cmpxchg((unsigned long )mem,(unsigned long)cmp,(unsigned long)with);
70	}	70	}
		71
		72	APR_DECLARE(void) apr_atomic_xchgptr(void mem, void with)
		73	{
		74	return (void)atomic_xchg((unsigned long )mem,(unsigned long)with);
		75	}




    return prev;
}

APR_DECLARE(void*) apr_atomic_xchgptr(void **mem, void *with)
{
    void *prev;
#if APR_SIZEOF_VOIDP == 4
    asm volatile (PPC_SYNC
                  "loop_%=:\n"                  /* lost reservation     */
                  "	lwarx   %0,0,%1\n"      /* load and reserve     */
                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
                  "	stwcx.  %2,0,%1\n"      /* store new value      */
                  "	bne-    loop_%=\n"      /* loop if lost         */
                  "	isync\n"                /* memory barrier       */
                  : "=&r" (prev)
                  : "b" (mem), "r" (with)
                  : "cc", "memory");
#elif APR_SIZEOF_VOIDP == 8
    asm volatile (PPC_SYNC
                  "loop_%=:\n"                  /* lost reservation     */
                  "	ldarx   %0,0,%1\n"      /* load and reserve     */
                  PPC405_ERR77_SYNC             /* ppc405 Erratum 77    */
                  "	stdcx.  %2,0,%1\n"      /* store new value      */
                  "	bne-    loop_%=\n"      /* loop if lost         */
                  "	isync\n"                /* memory barrier       */
                  : "=&r" (prev)
                  : "b" (mem), "r" (with)
                  : "cc", "memory");
#else
#error APR_SIZEOF_VOIDP value not supported
#endif
    return prev;
}

#endif /* USE_ATOMICS_PPC */

Lines 38-43 typedef WINBASEAPI apr_uint32_t (WINAPI Link Here

(-)apr/atomic/win32/apr_atomic.c (+13 lines)
38	typedef WINBASEAPI void * (WINAPI * apr_atomic_win32_ptr_ptr_ptr_fn)	38	typedef WINBASEAPI void * (WINAPI * apr_atomic_win32_ptr_ptr_ptr_fn)
39	(void **,	39	(void **,
40	void , const void );	40	void , const void );
		41	typedef WINBASEAPI void * (WINAPI * apr_atomic_win32_ptr_ptr_fn)
		42	(void **,
		43	void *);
41		44
42	APR_DECLARE(apr_uint32_t) apr_atomic_add32(apr_uint32_t *mem, apr_uint32_t val)	45	APR_DECLARE(apr_uint32_t) apr_atomic_add32(apr_uint32_t *mem, apr_uint32_t val)
43	{	46	{
Lines 135-137 APR_DECLARE(apr_uint32_t) apr_atomic_xch Link Here
135	return ((apr_atomic_win32_ptr_val_fn)InterlockedExchange)(mem, val);	138	return ((apr_atomic_win32_ptr_val_fn)InterlockedExchange)(mem, val);
136	#endif	139	#endif
137	}	140	}
		141
		142	APR_DECLARE(void) apr_atomic_xchgptr(void mem, void with)
		143	{
		144	#if (defined(_M_IA64) \|\| defined(_M_AMD64) \|\| defined(__MINGW32__)) && !defined(RC_INVOKED)
		145	return InterlockedExchangePointer((void**)mem, with);
		146	#else
		147	/* Too many VC6 users have stale win32 API files, stub this */
		148	return ((apr_atomic_win32_ptr_ptr_fn)InterlockedExchangePointer)(mem, with);
		149	#endif
		150	}




    ABTS_INT_EQUAL(tc, 50, y32);
}

static void test_xchgptr(abts_case *tc, void *data)
{
    int a;
    void *target_ptr = NULL;
    void *old_ptr;

    old_ptr = apr_atomic_xchgptr(&target_ptr, &a);
    ABTS_PTR_EQUAL(tc, NULL, old_ptr);
    ABTS_PTR_EQUAL(tc, &a, (void *) target_ptr);
}

static void test_cas_equal(abts_case *tc, void *data)
{
    apr_uint32_t casval = 0;

    abts_run_test(suite, test_read32, NULL);
    abts_run_test(suite, test_dec32, NULL);
    abts_run_test(suite, test_xchg32, NULL);
    abts_run_test(suite, test_xchgptr, NULL);
    abts_run_test(suite, test_cas_equal, NULL);
    abts_run_test(suite, test_cas_equal_nonnull, NULL);
    abts_run_test(suite, test_cas_notequal, NULL);

Return to bug 42806

Lines 189-192 APR_DECLARE(void*) apr_atomic_casptr(voi Link Here

(-)apr/atomic/unix/mutex.c (+13 lines)
189	return prev;	189	return prev;
190	}	190	}
191		191
		192	APR_DECLARE(void) apr_atomic_xchgptr(void mem, void with)
		193	{
		194	void *prev;
		195	DECLARE_MUTEX_LOCKED(mutex, mem);
		196
		197	prev = *mem;
		198	*mem = with;
		199
		200	MUTEX_UNLOCK(mutex);
		201
		202	return prev;
		203	}
		204
192	#endif /* USE_ATOMICS_GENERIC */	205	#endif /* USE_ATOMICS_GENERIC */

Lines 204-207 APR_DECLARE(void*) apr_atomic_casptr(voi Link Here

(-)apr/atomic/unix/ppc.c (+31 lines)
204	return prev;	204	return prev;
205	}	205	}
206		206
		207	APR_DECLARE(void) apr_atomic_xchgptr(void mem, void with)
		208	{
		209	void *prev;
		210	#if APR_SIZEOF_VOIDP == 4
		211	asm volatile (PPC_SYNC
		212	"loop_%=:\n" /* lost reservation */
		213	" lwarx %0,0,%1\n" /* load and reserve */
		214	PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
		215	" stwcx. %2,0,%1\n" /* store new value */
		216	" bne- loop_%=\n" /* loop if lost */
		217	" isync\n" /* memory barrier */
		218	: "=&r" (prev)
		219	: "b" (mem), "r" (with)
		220	: "cc", "memory");
		221	#elif APR_SIZEOF_VOIDP == 8
		222	asm volatile (PPC_SYNC
		223	"loop_%=:\n" /* lost reservation */
		224	" ldarx %0,0,%1\n" /* load and reserve */
		225	PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
		226	" stdcx. %2,0,%1\n" /* store new value */
		227	" bne- loop_%=\n" /* loop if lost */
		228	" isync\n" /* memory barrier */
		229	: "=&r" (prev)
		230	: "b" (mem), "r" (with)
		231	: "cc", "memory");
		232	#else
		233	#error APR_SIZEOF_VOIDP value not supported
		234	#endif
		235	return prev;
		236	}
		237
207	#endif /* USE_ATOMICS_PPC */	238	#endif /* USE_ATOMICS_PPC */

Lines 120-123 APR_DECLARE(void*) apr_atomic_casptr(voi Link Here

(-)apr/atomic/unix/ia32.c (+19 lines)
120	return prev;	120	return prev;
121	}	121	}
122		122
		123	APR_DECLARE(void) apr_atomic_xchgptr(void mem, void with)
		124	{
		125	void *prev;
		126	#if APR_SIZEOF_VOIDP == 4
		127	asm volatile ("lock; xchgl %2, %1"
		128	: "=a" (prev), "=m" (*mem)
		129	: "r" (with), "m" (*mem)
		130	: "memory");
		131	#elif APR_SIZEOF_VOIDP == 8
		132	asm volatile ("lock; xchgq %q2, %1"
		133	: "=a" (prev), "=m" (*mem)
		134	: "r" ((unsigned long)with), "m" (*mem)
		135	: "memory");
		136	#else
		137	#error APR_SIZEOF_VOIDP value not supported
		138	#endif
		139	return prev;
		140	}
		141
123	#endif /* USE_ATOMICS_IA32 */	142	#endif /* USE_ATOMICS_IA32 */

Lines 81-86 static void test_xchg32(abts_case *tc, v Link Here

(-)apr/test/testatomic.c (+12 lines)
81	ABTS_INT_EQUAL(tc, 50, y32);	81	ABTS_INT_EQUAL(tc, 50, y32);
82	}	82	}
83		83
		84	static void test_xchgptr(abts_case tc, void data)
		85	{
		86	int a;
		87	void *target_ptr = NULL;
		88	void *old_ptr;
		89
		90	old_ptr = apr_atomic_xchgptr(&target_ptr, &a);
		91	ABTS_PTR_EQUAL(tc, NULL, old_ptr);
		92	ABTS_PTR_EQUAL(tc, &a, (void *) target_ptr);
		93	}
		94
84	static void test_cas_equal(abts_case tc, void data)	95	static void test_cas_equal(abts_case tc, void data)
85	{	96	{
86	apr_uint32_t casval = 0;	97	apr_uint32_t casval = 0;
Lines 493-498 abts_suite testatomic(abts_suite suite Link Here
493	abts_run_test(suite, test_read32, NULL);	504	abts_run_test(suite, test_read32, NULL);
494	abts_run_test(suite, test_dec32, NULL);	505	abts_run_test(suite, test_dec32, NULL);
495	abts_run_test(suite, test_xchg32, NULL);	506	abts_run_test(suite, test_xchg32, NULL);
		507	abts_run_test(suite, test_xchgptr, NULL);
496	abts_run_test(suite, test_cas_equal, NULL);	508	abts_run_test(suite, test_cas_equal, NULL);
497	abts_run_test(suite, test_cas_equal_nonnull, NULL);	509	abts_run_test(suite, test_cas_equal_nonnull, NULL);
498	abts_run_test(suite, test_cas_notequal, NULL);	510	abts_run_test(suite, test_cas_notequal, NULL);